 |
GS76024A
|
|
|
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FT
Access
Time
(ns)
|
|
|
|
|
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Verilog
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BSDL
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VHDL
|
IBIS |
|
|
256K
x 24
|
3.3
V
|
8, 10, 12
|
T, U, GT, GU
|
Prod
|
|
|
n/a
|
n/a
|
n/a |
*Notes:
Spice models may be requested from our Applications Engineering Department here.
Denali models can be found here.
Synopsys models can be found here.
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