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GS8160(E/F)18/32/36B


Part No.
Org.
Operating
Mode
VDD and
I/O
Voltage
FT Access
Time
(ns)
PL
Frequency

(MHz)
Pkg.
Status

Datasheet

Models*
Verilog
BSDL
VHDL
IBIS
512K x 36
PL/FT
2.5/3.3 V
5.5, 6.5,
7.5
250,
200, 150
T/
GT
Prod
n/a
n/a
512K x 32
PL/FT
2.5/3.3 V
5.5, 6.5,
7.5
250,
200, 150
T/
GT
Prod
n/a
n/a
1M x 18
PL/FT
2.5/3.3 V
5.5, 6.5,
7.5
250,
200, 150
T/
GT
Prod
n/a
n/a
512K x 36
PL/FT
2.5/3.3 V
5.5, 6.5,
7.5
250,
200, 150
T/
GT
Prod
n/a
n/a
512K x 32
PL/FT
2.5/3.3 V
5.5, 6.5,
7.5
250,
200, 150
T/
GT
Prod
n/a
n/a
1M x 18
PL/FT
2.5/3.3 V
5.5, 6.5,
7.5
250,
200, 150
T/
GT
Prod
n/a
n/a
GS8160F36B
FT ONLY
512K x 36
FT
2.5/3.3 V
5.5, 6.5,
7.5
n/a
T/
GT
Prod
n/a
n/a
GS8160F32B
FT ONLY
512K x 32
FT
2.5/3.3 V
5.5, 6.5,
7.5
n/a
T/
GT
Prod
n/a
n/a
GS8160F18B
FT ONLY
1M x 18
FT
2.5/3.3 V
5.5, 6.5,
7.5
n/a
T/
GT
Prod
n/a
n/a

*Notes:
Spice models may be requested from our Applications Engineering Department here.
Denali models can be found here.
Synopsys models can be found here.


Features
. FT pin for user-configurable flow through or pipeline operation
. Single Cycle Deselect operation (GS816018/32/36B)
. Dual Cycle Deselect operation (GS8160E18/32/36B)
. ZQ mode pin for user-selectable high/low output drive
. 2.5 V or 3.3 V +10%/-10% core power supply
. 2.5 V or 3.3 V I/O supply
. LBO pin for Linear or Interleaved Burst mode
. Internal input resistors on mode pins allow floating mode pins
. Byte Write (BW) and/or Global Write (GW) operation
. Internal self-timed write cycle
. Automatic power-down for portable applications
. JEDEC-standard package; available in RoHS-compliant package

 

 

 

 

 
 
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