 |
GS8640(F)Z18/36-xxxV
|
|
|
|
FT Access
Time
(ns) |
|
|
|
|
|
Verilog |
BSDL |
VHDL |
IBIS |
|
2M x 36 |
PL/FT |
1.8/2.5 V |
6.5,
7.5, 8 |
250,
200, 167 |
GT |
Prod |
|
|
n/a |
|
 |
|
4M x 18 |
PL/FT |
1.8/2.5 V |
6.5,
7.5, 8 |
250,
200, 167 |
GT |
Prod |
|
|
n/a |
|
|
|
2M x 36 |
FT |
1.8/2.5 V |
6.5,
7.5, 8 |
n/a
|
GT |
Prod |
|
|
n/a |
|
|
|
4M x 18 |
FT |
1.8/2.5 V |
6.5,
7.5, 8 |
n/a |
GT |
Prod |
|
|
n/a |
 |
|
*Notes:
Spice models may be requested from our Applications Engineering Department here.
Denali models can be found here.
Synopsys models can be found here.
| Features |
.
FT pin for user-configurable flow through or pipeline operation
. NBT functionality allows zero wait read-write-read
bus utilization
. Fully pin-compatible NtRAM™, NoBL™, and ZBT™ SRAMs
. ZQ mode pin for user-selectable high/low output drive
. 1.8 V or 2.5 V +10%/-10% core power supply
. 1.8 V or 2.5 V I/O supply |
.
LBO pin for Linear or Interleaved Burst mode
. Internal input resistors on mode pins allow floating mode pins
. Byte Write (BW) and/or Global Write (GW) operation
. Internal self-timed write cycle
. Automatic power-down for portable applications
. JEDEC-standard package; available in RoHS-compliant package
|
|
