GS8672T19/37A

GS8672T19/37A

Part No.

Org.

Operating
Mode

VDD and
I/O
Voltage

FT Access
Time
(ns)

PL
Frequency
(MHz)

Pkg.

Status

Datasheet

Models*

Verilog

BSDL

VHDL

IBIS

GS8672T37A

2M x 36

1.8 V VDD;
1.5/1.8 V I/O

n/a

400, 375,
333, 300

E/GE

Samples

n/a

GS8672T19A

4M x 18

1.8 V VDD;
1.5/1.8 V I/O

n/a

400, 375,
333, 300

E/GE

Samples

n/a

*Additional Resources:
TimingDesigner component libraries can be found here.
SPICE models may be requested from our Applications Engineering Department here.
Denali models can be found here.
Synopsys models can be found here.

Features
. Simultaneous Read and Write SigmaQuad Interface . JEDEC-standard pinout and package . Dual Double Data Rate Interface . Burst of 2 Read and Write . 1.8 V core power supply . 1.5 V or 1.8 V I/O supply	. Pipelined Read operation . Fully coherent Read and Write pipelines . ZQ mode pin for programmable output drive strength . IEEE 1149.1 JTAG-compliant Boundary Scan . 165-Bump, 15 mm x 17 mm, 1 mm bump pitch BGA package . RoHS-compliant package available