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New 72Mbit SigmaQuad-II/DDR-II, SigmaQuad-II/DDR-II+,
and SigmaQuad-IIIe/DDR-IIIe ECCRAMs™
| GSI Technology is now shipping the industry's first family of ultra-low error rate SRAMs—GSI's ECCRAMs™. The new 72Mbit devices transparently encode and store error correction codes with every write and then read, decode, and, if necessary, correct bit errors using a fast ECC algorithim, reducing the SRAM's Soft Error Rate (SER) to less than 0.002 FITs/Mb—a 5-order-of-magnitude improvement over comparable technologies with no on-chip ECC. View the tables below for more information regarding GSI Technology's ECCRAMs. |
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SigmaQuad-II and SigmaDDR-II SRAMs
| SigmaQuad-II Burst of 2 SRAMs |
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FT Access
Time
(ns) |
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2M x 36
4M x 18 |
PL |
1.8 V VDD;
1.5/1.8 V I/O |
n/a
|
333, 300,
250,
200 |
E/GE |
Samples |
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| SigmaQuad-II Burst of 4 SRAMs |
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FT Access
Time
(ns) |
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2M x 36
4M x 18 |
PL |
1.8 V VDD;
1.5/1.8 V I/O |
n/a
|
333, 300,
250,
200 |
E/GE |
Samples |
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| SigmaDDR-II Burst of 2 SRAMs |
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FT Access
Time
(ns) |
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2M x 36
4M x 18 |
PL |
1.8 V VDD;
1.5/1.8 V I/O |
n/a
|
333, 300,
250,
200 |
E/GE |
Samples |
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SigmaQuad-II+ and SigmaDDR-II+ SRAMs
SigmaQuad-II+ Burst of 2 SRAMs
Read Latency = 2.5
On-Die Termination Option |
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FT Access
Time
(ns) |
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2M x 36
4M x 18 |
PL |
1.8 V VDD;
1.5/1.8 V I/O |
n/a
|
500,
450, 400 |
E/GE |
Samples |
 |
SigmaQuad-II+ Burst of 2 SRAMs
Read Latency = 2.0
On-Die Termination Option |
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FT Access
Time
(ns) |
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2M x 36
4M x 18 |
PL |
1.8 V VDD;
1.5/1.8 V I/O |
n/a
|
400, 375, 333, 300 |
E/GE |
Samples |
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SigmaQuad-II+ Burst of 4 SRAMs
Read Latency = 2.5
On-Die Termination Option |
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FT Access
Time
(ns) |
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2M x 36
4M x 18 |
PL |
1.8 V VDD;
1.5/1.8 V I/O |
n/a
|
633, 550, 500,
450, 400 |
E/GE |
Samples |
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SigmaQuad-II+ Burst of 4 SRAMs
Read Latency = 2.0
On-Die Termination Option
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FT Access
Time
(ns) |
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2M x 36
4M x 18 |
PL |
1.8 V VDD;
1.5/1.8 V I/O |
n/a
|
400, 375, 333, 300 |
E/GE |
Samples |
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SigmaDDR-II+ Burst of 2 SRAMs
Read Latency = 2.5
On-Die Termination Option |
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FT Access
Time
(ns) |
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2M x 36
4M x 18 |
PL |
1.8 V VDD;
1.5/1.8 V I/O |
n/a
|
633, 550, 500,
450, 400 |
E/GE |
Samples |
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SigmaDDR-II+ Burst of 2 SRAMs
Read Latency = 2.0
On-Die Termination Option |
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FT Access
Time
(ns) |
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2M x 36
4M x 18 |
PL |
1.8 V VDD;
1.5/1.8 V I/O |
n/a
|
400, 375, 333, 300 |
E/GE |
Samples |
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SigmaQuad-IIIe and SigmaDDR-IIIe SRAMs
| SigmaQuad-IIIe Burst of 2 SRAMs |
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Read Latency
(RL) |
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2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0
|
675, 450 |
K |
Samples |
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2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0
|
625, 400 |
K |
Samples |
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|
2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0
|
550, 375 |
K |
Samples |
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|
2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0 |
500, 333 |
K |
Samples |
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| SigmaQuad-IIIe Burst of 4 SRAMs |
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Read Latency
(RL) |
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2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0
|
675, 450 |
K |
Samples |
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|
2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0
|
625, 400 |
K |
Samples |
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|
2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0
|
550, 375 |
K |
Samples |
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|
2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0 |
500, 333 |
K |
Samples |
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SigmaDDR-IIIe Burst of 2 SRAMs
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Read Latency
(RL) |
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2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0
|
675, 450 |
K |
Samples |
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|
2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0
|
625, 400 |
K |
Samples |
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|
2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0
|
550, 375 |
K |
Samples |
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|
2M x 36
4M x 18 |
PL |
1.35 V VDD;
1.2/1.5 V I/O |
3.0, 2.0 |
500, 333 |
K |
Samples |
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