GS8342Q07BD-300I

Specifications

  • Part Number:GS8342Q07BD-300I
  • Type:SigmaQuad-II+
  • Density:36Mb
  • Configuration:x8
  • Speed (MHz):300
  • Burst Length:2
  • Read Latency:2
  • On Die Termination:Weak/None
  • Package:165 BGA
  • 6/6 ROHS:no
  • Temp:Ind
  • Special Features:none
  • Status:Production
  • MSL:3
  • ECCN:3A991
  • ECCN Suball:B2B
  • HTS Code:8542.32.00.40
  • REACH Certificate:
  • MDS:
  • Conflict Minerals Info:Contact Us
  • Datasheet
    Verilog
    BSDL
    VHDL
    IBIS

  • Simultaneous Read and Write SigmaQuad Interface 
  • Dual Double Data Rate Interface
  • Pipelined Read operation 
  • Fully coherent Read and Write pipelines
  • ZQ mode pin for programmable output drive strength
  • IEEE 1149.1 JTAG-compliant Boundary Scan 
  • JEDEC-standard pinout and package 
  • RoHS-compliant package available

AN1024

GSI ECCRAMs™—The Benefits of On-Chip ECC

AN1023

SigmaQuad/DDR IIIe/IVe SRAM Overview

AN1021

SigmaQuad and SigmaDDR Power-Up

AN1019

SigmaQuad-II+ and SigmaDDR-II+ On-Die Termination (ODT)

AN1017

SigmaQuad-IIIe Input and Output Clocking Scheme

AN1014

tKCvar Specification

AN1013

SigmaQuad Separate I/O Design Guide

AN1012

SigmaQuad Type I vs. Type II Timing Comparison

AN1010

SigmaQuad Common I/O Design Guide

AN1008

Address Pin Labeling Mismatch

AN1007

Pushing Your DSP to the Limit with GSI Technology SRAMs